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Honored Contributorvht test bench examples
Hello, I am specifying altera to generate a .vht test bench for my vhdl project. I want to modify this test bench so that I can specify the input signals to be some value at different times ins...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- However it is still not showing up on my signal viewer. --- Quote End --- How are you adding the signal to the viewer? You have to drag it from the signals list into the viewer. Assuming you're new to Modelsim, do the following ... In Modelsim, display the signals and wave window view signals wave then add all top-level signals add wave * then delete the ones you do not want to see, and select levels of the hierarchy to view the signals at that level of the design, and drag them across to the wave window. Right click and add dividers where you want to name blocks of signals, and then save it as a 'wave.do' file, or name of your choice, then later you can just type 'vsim mytest; do wave.do' to populate the wave window. Cheers, Dave
