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Altera_Forum's avatar
Altera_Forum
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15 years ago

VHDL String to std_logic_vector conversion

I'm trying to add some comments into my Modelsim wave files, and I realized that Modelsim can display a std_logic_vector as a text string. I've looked around for packages but haven't found anything. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

using the functions josb has posted, you can easily read strings in from a text file and do this.

But why not just put the string on the wave window? You know you can output text to the console too from your VHDL testbench?