VHDL state to entity

Using the state'pos attribute is in fact the most reasonable way.

Alternatively, you can also use the state type in the entity interface, you get a bit vector according to the state machine encoding, one-state-hot state by default. The type has to be defined in a package.

P.S.: In terms of logic effort, the pos attribute does the same as decoding the states to numbers, as kaz suggested. The internal representation of the state variable will be still one state hot.