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Altera_Forum
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15 years ago

VHDL robot design not working

Hello everybody I'm new in VHDL and I'm doing a project with DE2 board In the project I need to build a robot. My first step was to design a ASM and from that to take out the FSM which i...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

the duty cycle is 50000, so you need at least this many clock cycles before LED is valid. Your entire simulation runs for 1 us at 100MHz, so you get a grand total of 100 clocks.

Another problem - you dont assert reset so your counter will never count (because it's all 'U' when it does try and count).