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Altera_Forum
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15 years ago

VHDL robot design not working

Hello everybody I'm new in VHDL and I'm doing a project with DE2 board In the project I need to build a robot. My first step was to design a ASM and from that to take out the FSM which i...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

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I don't know what you mean when you say that the Led lag the rd_led they update together they are in the same IF Statement suppose to be any way that who I see it .

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Because you assign LED to rd_LED, LED takes the old value of rd_LED. Signals are not updated immediatly like variables, they are updated when a process suspends.

so whith this code in a clocked process:

b <= a;

c <= b;

this is what happens: 


clk   _|-|_|-|_|-|_|-|_|-|_|
a      0   1   2   3   4   5 
b      U   0   1   2   3   4
c      U   U   0   1   2   3