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Altera_Forum's avatar
Altera_Forum
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15 years ago

VHDL integers initialization and FPGAs

I've started coding in VHDL just less than a year ago - unexperienced student warning! My question is about integer initalization. I own an Altera DE1 board and I've also got some experience wi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

So how come my design (say a really simple UART receiver) freezes at some point, but when I initialize those integers at definition level it works fine without any glitches?

Please note that I had problems with other designs where I used integers in this manner (for counting).

Maybe the problem is with this "init don't care" mentioned above?

Anyhow, I attached the code, in case something's not right with it.