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Altera_Forum
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15 years ago

VHDL HC237 3-8 Decoder with latches

Hello, I'm trying to write the VHDL code for chip HC237. I think I have something written that will work for the most part, but my problem is in dealing with pin GL. Basically what this chip does i...
Altera_Forum's avatar
Altera_Forum
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15 years ago

What is the second process doing? where to A,B,C and A_reg, B_reg and C_reg come from? Looking at this process, no registers are created, just latches. There is no clock in your system.

looking at the first process, all you have is asynchronous logic. Nothing wrong with it. G1 has prority over G2, and if they are equal to '1' and '0' then Y is basically a 1-hot output version of I. Simple decoding.