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Altera_Forum
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15 years ago

VGA - horizantal sync pulse generation

hey, I am trying to generate horizantal sync pulse with FSM. I write the next verilog code: module horizantal_sync_pluse ( clock, //system clock reset, //system ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hey Kaz,

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I should add you to the list of My Gurus. So far only FvM and josyb managed to get there.

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You are too kind.

I just happened to see localparam used in some of the Altera Verilog :)

Cheers,

Dave