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Altera_Forum
Honored Contributor
15 years agoVGA - horizantal sync pulse generation
hey, I am trying to generate horizantal sync pulse with FSM. I write the next verilog code:
module horizantal_sync_pluse (
clock, //system clock
reset, //system ...
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- I would like define parameter Scan_Line=1'b0; parameter Gen_Sync_Pulse=1'b1; How can I do it? --- Quote End --- Try localparam Scan_Line=1'b0; localparam Gen_Sync_Pulse=1'b1; Cheers, Dave