Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Verilog code errors???

Hi, I have this piece of code which when compiled with Quartus II web free resulting in errors (follow comment //). Please advise how to fix them. Thanks. 1) assign Sclk = SCLKout; ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Nails is right, you cannot assign an inout type in an process, if did, how to handle the "in" part of the signal?