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Altera_Forum
Honored Contributor
15 years agoVerilog code errors???
Hi, I have this piece of code which when compiled with Quartus II web free resulting in errors (follow comment //). Please advise how to fix them. Thanks. 1) assign Sclk = SCLKout; ...
Altera_Forum
Honored Contributor
15 years agoFirst problem, you are trying to uses assign statements for registers.
Better to uses: CS_1 and CS_2 would have to be defined as registers. always @(posedge Clk26mhz) begin CS_1 <= CS1reg; CS_2 <= CS2reg; end I'm assuming on your# 2, you are trying to do a test bench reset strobe where rstb = 0 for 500 ticks then 1. This should be done in an initial block. and rstb defined as a register. initial begin rstb = 1'b0; # 500 rstb = 1'b1; end