Altera_Forum
Honored Contributor
Honored ContributorVDHL / verilog ?
bonjour I use fo many years AHDL but with quartus 10 I must change. What is the difference between VHDL and Verilog? which is better? thanks
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Altera_ForumHonored Contributor
Honored ContributorI do a lot of cross development using C to verify my designs (faster compiles, better debuggers....) For that reason, I use verilog. Most of the time the conversion between C and verilog is as simple as changing "begin / end" to "{ / }". When I started with FPGAs, I looked at VHDL and decided that life was too short for the extra verbosity.
