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Altera_Forum
Honored Contributor
9 years agoUsing PLL_L_CLKOUT on a MAX10
Hello, I'm using multiple Max10 devices: 10M02SCU169I7G I would like to use the DIFFIO_RX_L19 to output the PLL CLK (negative = pin M3 and positive is L3). The pin optional functions a...
Altera_Forum
Honored Contributor
9 years agoSomeone will correct me if I am wrong but those pins can work in differential mode (this does not mean LVDS) fitter simply routes your signal to 'p' pin directly and to 'n' trough NOT gate. This means that your output works in voltage mode and you need external resistors to suit LVDS standart. True LVDS output buffers works in current mode and you do not need to add external resistors at transmitter side. So in conclusion Quartus says that there is no such buffer that can be used to implement true LVDS buffer in those pins. If there is no such thing then you cannot acces it trough PLL or any logic.
Please share if you will found any other solution. Regards