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Altera_Forum
Honored Contributor
18 years agoUsing CRC detection with standalone FPGA
Hello, I'm planning a board with a standalone Stratis II FPGA. Since I have no external CPU on the board, I plan to use a EPCS device to configure the FPGA in AS mode. I want to employ the r...
Altera_Forum
Honored Contributor
18 years ago --- Quote Start --- I think, that a re-configuration could be achived with simple logic, e.g. generating an nconfig pulse on a crcerror rising edge, if this solution would meet your requirements. --- Quote End --- Where do you recommend to place this logic ? In the FPGA itself ? Usually nConfig goes from the configuration device to the FPGA. In what manner is it safe to connect another logic line to it ?