Using CRC detection with standalone FPGA

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I think, that a re-configuration could be achived with simple logic, e.g. generating an nconfig pulse on a crcerror rising edge, if this solution would meet your requirements.

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Where do you recommend to place this logic ? In the FPGA itself ?

Usually nConfig goes from the configuration device to the FPGA. In what manner is it safe to connect another logic line to it ?