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Altera_Forum
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15 years ago

Using ALTLVDS_RX megacore

Hi there, I would be really grateful if someone could shed some light for me.... alright here's the scenario; A LVDS stream(12 bit * 60 MHz = 720Mbps) is coming to my FPGA from an ADC, ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

If you are targetting to a Cyclone device, you should be able to type in a deserialization factor of 12 manually. Personally, I prefer a hand coded SERDES as sugested in this thread:

http://www.alteraforum.com/forum/showthread.php?t=27121

It's very similar to what the altlvds IP does with software SERDES, but it's more straightforward with factors like 14 and phase/delay settings are much clearer in my opinion.