Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

use OVL (Open Verification Library) with Quartus II VHDL

Hi hi!! I'm trying to add some assertions to my VHDL design (ex. ovl_always). I got the library from accellera (V2.6), and I just don't know which files should I ADD (Assignments/files/) to my pro...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Thanks Tricky, i know they are used for simulation and verification but i want to have them together with my code! 10 vhdl checkers in the OVL are synthesizable check page 12 (Accellera Standard OVL V2, Library reference manual Dec 2011) This doc its packed together with the library at docs! https://www.alteraforum.com/forum/attachment.php?attachmentid=6318

regards

m