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Altera_Forum
Honored Contributor
Honored Contributoruse OVL (Open Verification Library) with Quartus II VHDL
Hi hi!! I'm trying to add some assertions to my VHDL design (ex. ovl_always). I got the library from accellera (V2.6), and I just don't know which files should I ADD (Assignments/files/) to my pro...
Altera_ForumHonored Contributor
Honored ContributorOVL entities are meant for simulation, not for synthesis, so shouldnt be included in a quartus project.
