Unused IO Banks

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If you dont mind could you have a quick look at my schematic and see if i have made any simple mistakes / missing any thing.

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You have 3.3V/800mA generated from 12V. If you really expect this supply to generate 800mA, it will dissipate P = (12V-3.3V) x 0.8 = 6.96W. It'll get way too hot. Use a switch-mode supply if you really expect to use this much power. A similar argument holds for the 5V supply.

I personally prefer to buffer or put series resistances in the path between the JTAG header and the JTAG pins on the FPGA. This provides some ESD protection ... that zap you hear, right before your board stops working.

nCONFIG needs a pull-up or pull-down. The low-to-high transition on that signal is what resets the FPGA. See this doc for more details:

http://www.ovro.caltech.edu/~dwh/carma_board/fpga_configuration.pdf

Put a series resistor in your DCLK path and on your oscillator output (to control ringing).

Where are all your decoupling capacitors? Make sure you have one per power pin for every device.

Check your crystal oscillator circuit. It seems a bit simple. I thought they normally had low valued capacitance near them to tune the oscillation.

Cheers,

Dave