Understanding training patterns for Stratix-II deserializer DPA

Most of your questions can be easily answered, if you think about what the DPA does. It adjusts the phase on a bit level, that's all. Thus it basically needs some signal edges.

The problem get's more complicated if consider the properties of your transmission channel. A dispersive cable will introduce an interdependance of subsequent bits. That's a point, where the structure of training patterns starts to matter. But the problem isn't related to FPGA properties rather than to your external circuit.

Another point is, that DPA is often used in a combination with word alingnment. In this case, a training pattern should serve both purposes.