Honored Contributor
Honored ContributorHi Cyril,
First, I guess you have the following system : a big "horsepower" CAN master somewhere, connected to your "small" CAN slave board (i.e HC908 + MAX7000). I don't think that any STAPL, JAM, SVF or whatever player will fit in your HC09 device. For example, I implemented a SVF player running on a NIOS 2 processor : code size is about 50 KBytes, and SVF data for the CPLD being programmed (a Xilinx XC9536XL) is about 40 Kbytes. So It needs about 100 Kbytes for code+data :) However, maybe you could do the following : implement the SVF player in your "powerfull" CAN master, then implement in your slave some basic CAN commands allowing read/write accesses to the CPLD JTAG pins. The master SVF player should then use these commands to remotly access CPLD JTAG pins, merely seeing your slave board as a "JTAG expander". I recommend you using SVF files format because they are quite standards, but you will need an embedded SVF player. The one I use is in fact an XSVF player. C source code is freely available from ... Xilinx. I modified Xilinx source code (some I/O port routines initially targeted for PC parallel port) for my embedded system, I must say it was quite easy. I guess you could replace these routines with CAN one. Note that XSVF is a Xilinx binary version of standard SVF files. Being binary, XSVF files are smaller than standard SVF ASCII files, but you will need an SVF to XSVF converter. Again, this one is freely available from Xilinx. An other very good news is that this converter seems to allow converting any kind of SVF files : I mean no matter the vendor (Altera or Xilinx) :p . I converted a Cyclone 3 SVF file to XSVF without any problem. Here is the link to Xilinx app note : http://www.xilinx.com/support/documentation/application_notes/xapp058.pdf and the C source : ftp://ftp.xilinx.com/pub/swhelp/cpld/eisp_pc.zip Hope this helps. nb : Oh, at least, are you french ?
