Honored Contributor
Honored ContributorHi Mike,
--- Quote Start --- I am designing a custom board using a Stratix IV GX FPGA for the first time (EP4SGX70HF35). I'm interfacing three 16-bit ADCs to the FPGA and was considering using transceivers to receive the LVDS data. Do I need to implement a special megafunction (ALTGX) to use the transceiver pins or can they be treated as regular I/O pins? The bandwidth of the ADCs is not very high (less than 1 Gbps). Is there any benefit to using the transceivers? --- Quote End --- You cannot (easily) interface an arbitrary LVDS signal to a transceiver channel. Transceiver channels 'like' to receive modulated signals such that their clock-and-data recovery PLLs (CDRs) can lock-to-data and then recover the data. For applications under 1Gbps you're better off to stick with the LVDS receivers. Here's a 1GHz digitizer design with test results for LVDS at 1Gbps and 500Mbps. http://www.ovro.caltech.edu/~dwh/carma_board/ http://www.ovro.caltech.edu/~dwh/carma_board/digitizer_tests.pdf Cheers, Dave
