Transceiver Pseudo-CML equivalent circuit?

Hi Frank,

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I didn't scan for all related Altera patents

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No, I didn't think you had, but figured you might be interested in the patent I ended up finding.

Thanks for the hint to look at patents, I'll have to remember that in the future.

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I found I/O driver the stuff when looking for something different.

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I also found lots of other patents that will distract me from doing real work :)

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The current switching topology refers to the standard design for LVDS drivers. It typically has no termination voltage source but a common mode voltage control loop, see the below schematic. You would be able to identify the actual implementation by dynamical measurements, because the common mode control loop would show a reduced bandwidth.

On the other hand, the schematic is still a simplification, because it has no programmable termination resistors.

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Thanks. I'm happy with my simplified understanding of the transmitters now.

You don't happen to have any insight into the receiver common mode voltage range, and the current source capabilities of the receivers do you?

Cheers,

Dave