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Honored Contributor
Honored ContributorTo build a FIFO using SRAM
Hi, I would like to build a DCFIFO using a SRAM chip on DE2-115. Any idea on where i should start? I know SRAM reads and writes on a different clock cycle as the dataIn and dataOut share t...
Altera_ForumHonored Contributor
Honored ContributorIIRC, the SGDMA component is not dual clock capable.
You need to put a dual clock fifo component between the ADC and the SGDMA component. And you need to run the SGDMA and memory controller at a higher clock frequency than your ADC.
