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Altera_Forum's avatar
Altera_Forum
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15 years ago

To build a FIFO using SRAM

Hi, I would like to build a DCFIFO using a SRAM chip on DE2-115. Any idea on where i should start? I know SRAM reads and writes on a different clock cycle as the dataIn and dataOut share t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Dave,

So, basically.. this is just to create an input port for ADC data to enter to the SGDMA core in the SOPC built block?

I kind of know what you are trying to say, after spending some time in SOPC builder.

--- Quote Start ---

aso_data <= adc_data;

aso_valid <= '1';

--- Quote End ---

Why is the valid bit asserted all the time? it does not go invalid? then whats the point of having a valid bit?

Since you said the process is quite easy, do you think you can make this component in SOPC and send it to me? i really need to look at examples to learn to do it right, so many things can go wrong the first time. This is very new to me.

Thanks!

Michael