Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

To build a FIFO using SRAM

Hi, I would like to build a DCFIFO using a SRAM chip on DE2-115. Any idea on where i should start? I know SRAM reads and writes on a different clock cycle as the dataIn and dataOut share t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

--- Quote Start ---

You will need to design the ADC to Avalon-ST streaming component

--- Quote End ---

Hi Dave,

From your previous post, you said i need to design the input port for Avalon ST? I don't quite know how to start. Can i use PIO core to supply the stream or a DCFIFO(input from ADC and output to ST sink of SGDMA) ?

If i transfer from DCFIFO to SRAM, can i use memory-to-memory configuration of SGDMA?

Thank you.

Michael