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Altera_Forum
Honored Contributor
Honored ContributorTiming of RAM
I use Simple Dual-port memory as a FIFO. The attachment is Simple Dual-Port Timing Waveforms in Altera's handbook. It seems the address changes on the negative edge of clock. This makes my design...
Altera_ForumHonored Contributor
Honored ContributorIt only looks that the address changes on the falling edge. The waveforms have been drawn to emphasize maximum setup and hold times in regard with the positive edge of the clocks, but all changes occur on the rising clock edges.
