Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Timing error when storing result in RAM blocks using In-System Memory Editor

Hi, My design consists of some mathematical calculations (multiplications, additions,...). I supply the input using a RAM block and am trying to store the output using another RAM block. I use ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I suggest full rtl simulation of all design including RAMs in order to verify that the write/read logic is doing its job.