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Altera_Forum
Honored Contributor
15 years agoTiming constraints for output clock pin
I'm constraining a synchronous interface to a USB chip, and I've got all the timing constraints in for the data and control lines. Timequest is still listing the output clock itself as unconstrained....
Altera_Forum
Honored Contributor
15 years agoas you have realised clk output does not need constraints by itself. to keep timequest happy set false path:
set_false_path -to [get_ports {clkout}] exception to that if you need to treat it as any nonclk output