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Altera_Forum's avatar
Altera_Forum
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13 years ago

TimeQuest reporting paths between multiple LPM Divides

Hi, I'm using the latest version of Quartus (12.1 with sp1) and a number of LPM dividers in a Cyclone 3 FPGA design (plus other LPMs, RAMs, PLLs, VHDL modules, etc.,). The dividers in question...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

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Sounds like a bug at first sight. Did you try to locate the said path in the gate level (post mapping) netlist viewer?

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I've just had a look and (in a 48k LE design) can not really trace the path from one component to the other or really make sense of what the netlist is showing me.

I've tried a Forum search without result. To explain a little further I have about 6 LPM_dividers in the design with various other LPM elements and VHDL modules between them but no direct routes, I get paths between some of the dividers. I was really hoping that someone had seen this happen before or knew what the divider structure was. I'm wondering if there is some common element between the dividers that they are all using.