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Altera_Forum's avatar
Altera_Forum
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15 years ago

Time delay

Hello I want to create time delay using logic gates (not flip-flops) When I put carry gates, or any other gates, the time analyzer shows 0 delay Can anyone help I can...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Im guessing the synthesisor removed your logic as it was seen as redundant. Have you used the keep attributes (outlined above) to stop it doing this?