The Cyclone 10Gx LVDS Pad requirement with DC-Coupled links

Hi, Sorry for the delay and thanks for your patience. Please see my response to your inquiries as following: 1, For questions 1---" Can we use DC-Coupled link besides the AC-Coupled link for Cyclone 10Gx transceiver RefCLK_GXB1C_CHTP LVDS pad ? " [CP] For your information, since you are using the refclk with LVDS IO standard, you must use AC coupled for the transceiver refclk. The DC coupled is allowed for HCSL IO standard which is for PCIe application. 2. 2, One more question about the transceiver refclk Vicm value for AC-Coupled link [CP] Yes, you are right, when the VCCR_GXB = 0.95V, you would need to supply VICM value of 0.95V to the refclk. Regarding the measurement that you did at for the devkit, would you mind to share with me how you measure the voltage? Generally the VICM need to be measure at the FPGA ball to more precise. For your information, if you are enabling the on-chip termination (which is default setting in Quartus except for HCSL) for the refclk, there will be internal biasing circuitry to construct the right VICM internal. You will not need to build external on board biasing circuitry. Please let me know if there is any concern. Thank you. Best regards, Chee Pin