The Cyclone 10Gx LVDS Pad requirement with DC-Coupled links

Hi:

1, For questions 1---" Can we use DC-Coupled link besides the AC-Coupled link for Cyclone 10Gx transceiver RefCLK_GXB1C_CHTP LVDS pad ? "

We have found the following statement from intel Cyclone 10gx IO guide line statement:

https://www.intel.com/content/www/us/en/programmable/documentation/osf1485840198234.html#czh1485915417341

REFCLK_GXB[L1] Input High speed differential reference clock positive receiver channels, specific to each transceiver bank of the left (L) side of the device.

These pins must be AC-coupled if the selected REFCLK I/O standard is not HCSL.

So please confirm that we can't use DC-Coupled link for Cyclone 10Gx transceiver RefCLK_GXB1C_CHTP LVDS pad.

2, One more question about the transceiver refclk Vicm valuefor AC-Coupled link:

In Cyclone 10GX datasheet (2c10gx-51002.pdf: page 23), The Vicm is 0.95V when Vccr_GXB = 0.95V.

At the same time, We have measured the transceiver refclk Vicm from Intel Cyclone 10Gx development kit.

(https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-10/gx/design-tools.html.)

T he Vicm is only 0.8V in our measurement which is smaller than your spec.

Can you help check it again ?

Thanks,

Ke