Forum Discussion
Honored Contributorsynchronize pll
On CycloneII, is it possible to re-synchronize or start a pll on an async event such as a pulse?
I have a 50Mhz pll clocked state machine that is triggered from a single external async pulse. I also have a Flash A/D that is running on a separate, continous 10mhz pll clock. What I would like to do is synchronize the two plls such that the A/D clock is aligned to my external pulse so its sampling times are predictably synched to my state machine logic. The A/D is designed to operate from a continuous clock only and has an internal 4clk conversion delay. The very first result may be bad but I can live with that. I thought of using counters to generate a 10Mhz clock directly from the 50Mhz state machine logic but it would be better if I could use a pll so as to have some control over phase.14 Replies
Altera_ForumIt is from external equipment. This trigger pulse is latched by 50Mhz logic. After latching, the very next clock starts the state machine. I will probably use the digital pll method suggested, or just generate the 10Mhz clock from the 50mhz logic. Counters are simple.
- Altera_Forum
Where is the pulse coming from that would start your state machine? How do you intend to phase align your 50 MHz clock with the 10MHz clock that the A/D is using?
- Altera_Forum
I think, the only suitable solution to synchronize a clock to single pulse is a digital PLL created in your design. But the timing resolution is limited by the reference clock, could be up to 300 or 400 MHz with cyclone II.
- Altera_Forum
Look at:
http://www.alteraforum.com/forum/showthread.php?t=1473&highlight=pll This is a sample design I did to have PLLs across multiple FPGAs correlate. I think it might work for what you're doing. (You don't need most of the design, but the idea of using the altclkctrl as a enable is the trick...)
