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I don't have a dev kit available. I was hoping someone here that has a devkit or their own design could confirm or deny the existence of the issue, and if it does exist point to a user error causing it.
I think in the case of the kit boards that have both serial and parallel flash config options most times it will the the parallel that is getting the workout.
I've filed an SR.
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How about this;
1. Create a minimum design which only uses say an LED
Create a Tcl script to synthesize that design, including creating the pin assignments, and tri-stating unused inputs.
2. Synthesize it for your board
3. Document the procedure to reproduce the failure (as above but with more detail)
4. Synthesize it for the Stratix V development kit
5. Ask the engineer that responds to your SR to perform the same sequence on the kit
The engineers at Altera have access to the kits. They sometimes have to wait while they borrow one "from the factory".
If you make the SR engineer job simple, then they have a harder time ignoring you :)
Cheers,
Dave
Honored Contributor
