stratix III with DDR2 temination

I didn't use Stratix III yet. Rs is the serial termination, 50 ohm for SSTL class I respectively 25 ohm for SSTL class II. It can be set independantly of dynamic OCT, but I expect that both are used by default when generating a DDR2 controller by the MegaWizard. It's important to follow the instructions and also import the *.tcl files that contain these settings.

I would generally follow the termination scheme suggested in AN408 (updated revison of July 2008!). This means one external parallel termination at the RAM for CMD/ADDR and no external termination for DQ/DQS. With your rather slow 150 MHz clock, the design may also operate without external termination, but I won't recommend it.

There are, by the way, also specifications regarding maximal delay skew for CLK to ADDR/CMD and DQS to DQ.