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Altera_Forum
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18 years ago

stratix III with DDR2 temination

hi my design include stratix III device with 2 ddr2 hp core. each core is facing 5 DDR2 components when 1 of the 5 is for ECC. i looked at the termination schemes in AN408 and not found my ans...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

when i enable dynamic OCT does the FGPA automatically implements Rs when writing to memory and Rt when reading from memory??

what termination do you recommend if i use SSTL-18 class I in a point to point data line layout ?

and what about the ADD,CMD?

the traces length is very short..the components are located near the fpga