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Altera_Forum
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18 years ago

stratix III with DDR2 temination

hi my design include stratix III device with 2 ddr2 hp core. each core is facing 5 DDR2 components when 1 of the 5 is for ECC. i looked at the termination schemes in AN408 and not found my ans...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

thats ok but where does the OE & Toggle rate take affect?

if i entered 50% OE so the PU is effective 50% of the time so 16mWX170X0.5 DQ/DQS lines take = 1360mW.

the rest of the time there is a Rs on the line so 4mWX170X0.5=340mW.

thats adds to 1700mW .

and what about toggle rate? the termination takes less power when u reduce the toggle rate...

if i enter these specification to the EPE i get much more power (about 5 W more when i choose SSTL-18 with Rs and PU.)

maybe i shouldnt choose PU? altera PDF that comes with the EPE is not clear & does not specify exactly..