Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

SRAM interface timing discrepancy from Quartus-II 7.0 and 9.0

I have a design which contains an SRAM interface with the default PLL phase shift, -4.8ns for this SRAM. It was compiled by Quartus-II 7.0 and it works perfectly on my target board with an EP2C20F484...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

The oscilloscope I have been using is LeCroy WaveRunner 6050A, 500MHz. If necessary, I will verify and validate them. Do you think that the SSRAM interface with SOPC 9.0SP1 is significantly different from the SSRAM interface with SOPC 7.0? Many thanks.