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Honored Contributor
Honored ContributorSoC component
Hi every body, please i need a confirmation before i start to create my SoC. In attached picture wich represent the component that i need in my SoC. I don't know really, in each SoC it is ...
Altera_ForumHonored Contributor
Honored ContributorI'm sorry but I still don't understand what your problem is or what you want to achieve.
The PLL needs a valid clock input. It can either be the output of another pll or one of the FPGA's pins. In your case you can pick up from the kit manual the number of the pin that is connected to an oscillator, and connect that pin to the pll's input. This seems to be what you did. Now the PLL's outputs are connected to the FPGA's global clock network and can be directly used by your logic. It isn't related to any pin.
