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Altera_Forum
Honored Contributor
13 years agoMT9V034.
I'm implementing the ALTLVDS_RX with a deserialization factor of 6 and registering the two consecutive 6-bit nibbles to create 12-bit words. I'm simulating in ModelSim using a training pattern and it appears to lock on with good word alignment, but then I'll see a single corrupted word followed by a bit alignment problem. Pulsing the rx_channel_data_align port several times I see the bit alignment shift left, but then rolls over and skips a bit alignment and goes back to the bad alignment. I suspect the DPA switched the sample clock when I received the corrupted word and now I can't get it to align. To better illustrate what I'm seeing, I'm expecting the following pattern "000101110101", but received "001011101010". Each pulse of rx_channel_data_align shifts the pattern left by a bit until I get to "101010001011", then on the next pulse I'm back to "001011101010". It could be that I've hit my "data_align_rollover" parameter which is currently set to 6. The datasheet/user guide seems to imply that this can be set higher than the deserialization factor...