Singed M_by_M multiplication

We here work on fpga platforms and make use of ready-made blocks of rams/mults/possibly adders/PLL/serdes ..etc. The rest of functions are left to designers to implement in the logic fabric. So we have little choice of available sub-components.

I know Universities don't draw a clear line between fpga and asic as they prepare students for all areas. Thus the best place for your question is an ASIC forum, they are proud people and know a lot about silicon level design.