Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Silicon Speed

Hi, I have a basic query regarding FPGA's in general. I always believed that silicon is faster at lower temperatures and slower at hotter temperatures, but that the core current in an FPGA is...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Hi Ardni:

Yes, if you only give a single constraint, for Maximum/Minimum, Quartus will attempt to meet that constraint under both conditions, however it will be impossible, so you'll end up with timing violations. It's always advisable to specify realistic max and min delays in that situation, so the tool can work on the real issues, instead of spinning it's wheels on a problem it can not solve.

Anakha