Forum Discussion

hexxx's avatar
hexxx
Icon for New Contributor rankNew Contributor
2 years ago

Selection a FPGA/CPLD

Greetings Cyborgs. I am new here and i am a noob. My goal is to conceive a bus switch which connects each 64 possible input to each possible 64 output. I need to implement just 64 pieces of 1:64 MU...
Fpga Devkit
_AK6DN_'s avatar
_AK6DN_
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Depends a lot on what type of I/O you require and the data rate of the I/O.

Would 3.3V LVCMOS at 50MHz maximum meet your needs? Or is much slower ok? Or do you need much higher speed?

Any specific package requirements? Is a BGA ok, or do you prefer a leaded SMT package?

Basically there are MAX10 and Cyclone4 or Cyclone5 parts that should meet your needs, depending on your detailed requirements.