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Altera_Forum
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18 years ago

sampled signal on falling or risins edge?

Hello, I have a beginner question. With the code below The signal in_width_pulse_n is wide of one period (clk_speed) My question is on signal old1_width_pulse_n I must be sampled it ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Ok if I summarize. I can just use rising edge as long as the timing analyzer is ok.

Except for communicate with external component.

But I though use alternative falling rising edge for a safer marging.:p