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Honored Contributor
Honored ContributorRis/fall time?
Hello, I am developing a simple test board for a cyclone FPGA (EP2C8T144). It is my very first FPGA project, and I want to build my own FPGA board. Now, my question is: Which rise and fall...
Altera_ForumHonored Contributor
Honored ContributorHave to agree with FvM here. I have generally used a series terminaton at source and not had any issues. On Chip series termination is a good idea.
This article is pretty good http://www.ultracad.com/mentor/mentor%20termination%20placement.pdf Rgds
