Forum Discussion
Altera_Forum
Honored Contributor
17 years agoHi,
Thanks for your reply. I do have a MAC Ip in my FPGA. This is interfacing with external PHY and internally for GFP processing. This MAC supports 10/100 currently using MII at PHY i/f. My idea is to remove this MAC block from FPGA. Put this MAC block in L2 switch. Improve support up to 10/100/1000. This block has to interface with FPGA - GFP block. Towards this interface do I need SGMII or SerDes? I am also looking in to Altera Tri Speed Mac but unable match my requirements as described above.