Forum Discussion
refresh ip in sopc component editor
Hi
I'm trying to "analyze synth files" that I add in the sopc component editor but I have these errors : Error: VHDL Use Clause error at pwm_inverter_controller.vhd(40): design library "work" does not contain primary unit "pwm_inverter_pkg" .. can you please help to fix that!! Best regards11 Replies
- Altera_Forum
Honored Contributor
it looks like you need to add to the component the vhdl file that describes "pwm_inverter_pkg"
- Altera_Forum
Honored Contributor
yep thats right but i did this on the tcl file , now with component editor it doesnt care about my manually modifications on the TCL file,bug bug !!!!
- Altera_Forum
Honored Contributor
Did you read the first line of the TCL file saying not to edit this file? This isn't a bug. Either you use only the component editor and stick to it, or you manually edit the TCL file and then never reuse the component editor again on that component. You can't expect the editor to reparse all your file and support the full TCL syntax, it wasn't designed for that.
- Altera_Forum
Honored Contributor
I changed this line to make them editaable !!but didnt te job!thanks for your answer
- Altera_Forum
Honored Contributor
I have now this error could you please check what thats mean?
Error: Could not determine TOP_LEVEL_HDL_MODULE because file entity.vhd contained no modules !! - Altera_Forum
Honored Contributor
--- Quote Start --- I have now this error could you please check what thats mean? Error: Could not determine TOP_LEVEL_HDL_MODULE because file entity.vhd contained no modules !! --- Quote End --- It is telling you that the file "entity.vhd contained no modules". As a result of that, it "could not determine TOP_LEVEL_HDL_MODULE". Whatever you have said in your TCL file, the tool thinks it should be able to find at least one module in "entity.vhd" and it plans on using that as the name of your top level because you haven't told it not to. - Altera_Forum
Honored Contributor
well let me explain I have an old project that working with the entity entity.vhd ( as top level) , I changed this entity ( components in this entity) , and keepeed the structure of the project.so now have this error , excuse me i'm not expert of VDHl so i try to understand why now is not working.
- Altera_Forum
Honored Contributor
Perhaps you should add the paths to other VHDL files to the tcl file as well?
- Altera_Forum
Honored Contributor
well I did!!
- Altera_Forum
Honored Contributor
will check but dont have any tcl files for others modules !!