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XQSHEN's avatar
XQSHEN
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

configurate altlvds_rx input port rx_syncclock for cyclone iv

EP4CE22F17C7 The ip user guide, we can see input port rx_syncclock for this ip altlvds_rx. But I can not see anywhere from quartus prime 18.0.
AminT_Intel's avatar
AminT_Intel
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hello,


This option is enabled when the LVDS is implemented in logic. When you turn on this option, it adds an input port, which when asserted performs an asynchronous reset of all the logic in the ALTLVDS_RX IP core excluding the PLL.


Thank you.