Forum Discussion
Occasional ContributorAgilex 5 E-Series Ethernet with 1588 via HPS EMAC
Hi,
Aik Eu is OOO.
Yes you can use the SGMII and SGMII+ using soft logic with the appropriate general purpose, TDS, or transceiver I/O resources. Reference-https://www.intel.com/content/www/us/en/docs/programmable/814346/24-1/phy-interface-01.html
You can also route the MDIO pin to FPGA and with shared MDIO interface for multiple PHY devices and their configuration and management.
Regards
Tiwari
Regular ContributorHi Nicole04,
Can check with Figure 51 on the Agilex 5 Technical Reference Manual regarding the possible connections.
Refer to 5.1.3.8. PHY Interface as well.
If you are going to use HPS EMAC, there is no need to consider the Triple-SPeed Ethernet IP.
Thanks.
Regards,
Aik Eu
Nicole04Hi Aik Eu,
Thank you for your reply.
I will then not use the Triple-Speed Ethernet IP for this connection.
Should I use a transceiver or the HSIOs (with TDS) for the SGMII connection between the PHY chip and the FPGA (EMAC)?
If I have another ethernet connection that has to be connected to the FPGA fabric (via SGMII through a transceiver), which will use the Triple-Speed Ethernet IP, can I use a shared MDIO bus between this connection and the EMAC one? Where will the MDIO signals then be connected?
Thank you for your assistance.
Kind regards,
Nicole
