Random results on FPGA

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Good, but using clock uncertainty to solve the problem, still seems to mean Quartus II fitting process does not smart enough.

It might still be good for you to file a service request for Altera to look into what they can do better

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Quartus is doing a proper job.

clock uncertainty cannot be predicted and is design/fpga yield dependant.

I'm currently in contact with them to get the excel sheet to calculate the real clock uncertainty,

as they do it for hardcopy devices.